Joseph R. Cavallaro

About

Joseph R. Cavallaro is a Professor in the Department of Electrical and Computer Engineering at Rice University, where he has been a faculty member since 1988. He also holds a courtesy appointment in the Department of Computer Science and serves as the Director of the Center for Multimedia Communications at Rice. His research focuses on special-purpose VLSI processor architectures, with particular emphasis on their application to signal processing, computer graphics, and robotics. His work involves the development of parallel array architectures optimized for matrix computations, which are fundamental to many numerical algorithms used in wireless communication systems. These algorithms benefit from enhanced parallel architectures and high-speed computer arithmetic, and his research includes studying their efficient implementation on DSP, ASIC, and Application-specific Instruction Processors (ASIP). Dr. Cavallaro holds a Ph.D. in Electrical Engineering from Cornell University, an M.S. from Princeton University, and a B.S. from the University of Pennsylvania. He has been recognized as an IEEE Fellow and has received awards such as the NSF Research Initiation Award and the IEEE Circuits and Systems Society Distinguished Lecture.

Research topics

• Computer Science
• Artificial Intelligence
• Telecommunications
• Computer network
• Operating system
• Algorithm
• Parallel computing
• Database
• Computer architecture
• Mathematics

Selected publications

• Towards Scalable and Channel-Robust Radio Frequency Fingerprint Identification for LoRa

  IEEE Transactions on Information Forensics and Security · 2022 · 316 citations

  Senior authorCorresponding

  Radio frequency fingerprint identification (RFFI) is a promising device authentication technique based on transmitter hardware impairments. The device-specific hardware features can be extracted at the receiver by analyzing the received signal and used for authentication. In this paper, we propose a scalable and channel-robust RFFI framework achieved by deep learning powered radio frequency fingerprint (RFF) extractor and channel independent features. Specifically, we leverage deep metric learni…

  DOI

• Radio Frequency Fingerprint Identification for Narrowband Systems, Modelling and Classification

  IEEE Transactions on Information Forensics and Security · 2021 · 219 citations

  Senior authorCorresponding

  Device authentication is essential for securing Internet of things. Radio frequency fingerprint identification (RFFI) is an emerging technique that exploits intrinsic and unique hardware impairments as the device identifier. The existing RFFI literature focuses on experimental exploration but comprehensive modelling is missing. This paper systematically models impairments of transmitter and receiver in narrowband systems and carries out extensive experiments and simulations to evaluate their eff…

  DOI

• A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures

  IEEE Communications Surveys & Tutorials · 2021 · 66 citations

  Non-binary low-density parity-check (NB-LDPC) codes show higher error-correcting performance than binary low-density parity-check (LDPC) codes when the codeword length is moderate and/or the channel has bursts of errors. The need for high-speed decoders for future digital communications led to the investigation of optimized NB-LDPC decoding algorithms and efficient implementations that target high throughput and low energy consumption levels. We carried out a comprehensive survey of existing NB-…

  DOI

• Towards Receiver-Agnostic and Collaborative Radio Frequency Fingerprint Identification

  IEEE Transactions on Mobile Computing · 2023-12-06 · 50 citations

  articleOpen access

  Radio frequency fingerprint identification (RFFI) is an emerging device authentication technique, which exploits the hardware characteristics of the RF front-end as device identifiers. The receiver hardware impairments interfere with the feature extraction of transmitter impairments, but their effect and mitigation have not been comprehensively studied. In this paper, we propose a receiver-agnostic RFFI system by employing adversarial training to learn the receiver-independent features. Moreover…

  PublisherOA PDFDOI

• A Unified Parallel CORDIC-Based Hardware Architecture for LSTM Network Acceleration

  IEEE Transactions on Computers · 2023-04-19 · 16 citations

  articleSenior author

  Deep Neural Networks (DNNs) have recently become the standard tool for solving various practical problems in a wide range of applications with state-of-the-art performance. Recurrent Neural Networks (RNNs) such as Long Short-Term Memory (LSTM) are a subset of DNNs with fully connected single or multi-layer networks. The complex neurons and internal states of LSTM networks enable them to build a memory of events, making them ideal for time series applications. Despite the great potential of LSTM…

  PublisherDOI

Recent grants

• EAGER: Collaborative Research: Cross-Layer Modeling and Design of Energy-Aware Cognitive Radio Networks

  NSF · $150k · 2013–2016

• Unifying Application Specific Processors for Communication Systems

  NSF · $218k · 2006–2010

• US-Ireland Partnership: WiPhyLoc8: Dynamic WiFi Positioning using Physical Layer Parameters for Location-based Services and Security

  NSF · $392k · 2012–2016

Frequent coauthors

• Amara Amara

  Beihang University

  349 shared

• Yong Lian

  University of Calgary

  349 shared

• Guoxing Wang

  Shanghai Jiao Tong University

  349 shared

• Yen-Kuang Chen

  333 shared

• Manuel Delgado‐Restituto

  332 shared

• Alon Ascoli

  Polytechnic University of Turin

  332 shared

• N Neihart

  IEEE Computer Society

  332 shared

• Mohamad Sawan

  Polytechnique Montréal

  317 shared

Labs

• VIP TeamPI

Awards & honors

• 2015 IEEE Fellow
• 2012-2013 IEEE Circuits and Systems Society Distinguished Le…
• 1989-1992 NSF Research Initiation Award

Similar researchers at Rice University

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• Richard G. Baraniukh-97
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