About

Talicia L. Jackson, MD, is an Assistant Professor of Clinical Practice in the Department of Obstetrics, Gynecology and Reproductive Health at Rutgers New Jersey Medical School. She completed her MD in 2020 at Rutgers New Jersey Medical School. Her professional role involves clinical practice within the department, and she is affiliated with University Hospital in Newark. Her licensure is registered in New Jersey. The information provided does not include specific details about her research focus or key contributions.

Research topics

• Electrical engineering
• Materials science
• Computer Science
• Optoelectronics
• Engineering
• Composite material
• Acoustics
• Physics

Selected publications

• PiezoMEMS Fabrication on Flexible Stainless-Steel Substrates

  Sensors · 2026-04-05

  articleOpen access

  A bottom-up fabrication approach for flexible piezoelectric micromachined ultrasound transducer (PMUT) arrays on stainless-steel substrates was developed. Devices were fabricated using chemical solution deposition of a 700 nm-thick layer of Pb0.99□0.01(Zr0.52Ti0.48)Nb0.02O3, where □ denotes a vacancy on the Pb site, on 50 μm-thick LaNiO3/HfO2/stainless-steel foils. Lithography for definition of the electrode and piezoelectric layers was completed on the front of the wafer. Ni electroplating on the back side of the foil was used to create locally stiff areas to define the deflection area. PMUT devices were successfully fabricated using this method. The permittivity and loss tangent of the fabricated device at 1 kHz were 283 ± 9 and <1.5%, respectively. The remanent polarization was measured to be 38 ± 0.3 μC/cm2.

  PublisherDOI

• GaN Digital IC Operating Up to 800 °C Temperature

  IEEE Transactions on Electron Devices · 2026-02-06

  article
  PublisherDOI

• AlGaN/GaN Sidewall Gated HEMTs

  IEEE Electron Device Letters · 2026-03-30

  article

  This letter reports the concept and implementation of a novel AlGaN/GaN sidewall gated HEMT design. This new device structure can achieve a high threshold voltage, based on a p-GaN/AlGaN/GaN epitaxy stack, by forming a MOS gate on the p-GaN sidewall. Incorporation of composition grading in the AlGaN layer eliminates electron injection barrier between the vertical channel on the p-GaN sidewall and the lateral 2DEG channel, resulting in favorable output I-V characteristics. Experimental implementation of this new device design resulted in a high threshold voltage of 3.5 V, favorable on-state I-V characteristics, low value of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C_gd</i>, breakdown voltage of 1050 V, and controlled degradation of dynamic on-resistance. Further improvements in on-resistance can be expected by optimizing device geometries; and further improvements in breakdown voltage and dynamic on-resistance can be expected with improved charge balance in the drift region.

  PublisherDOI

• Thinking MOSFETs

  IEEE Transactions on Electron Devices · 2025-02-10

  article1st authorCorresponding

  The equations typically taught and used to estimate the threshold voltage for MOSFETs, based on the band bending in the MOSFET channel, are simple and easy to develop. However, they work well only for a subset of MOSFET types that do not include the MOSFETs of greatest interest today, including finFETs, nanosheet FETs, and most thin-film transistors (TFTs). This note provides an alternative, where threshold voltage is understood as moving the Fermi level to near the relevant band edge (conduction band minimum for n-channel MOSFETs or valence band maximum for p-channel MOSFETs).

  PublisherDOI

• Aluminum Boron Nitride Ferroelectric Field-Effect Transistors With ZnO Semiconductor Channel

  IEEE Transactions on Electron Devices · 2025-05-28

  articleSenior author

  The discovery of ferroelectricity in hafnium zirconium oxide (Hf<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>x</i></sub>Zr<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>1</roman>-<i>x</i></sub>O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>2</roman></sub>) and related fluorite materials has spurred interest in ferroelectric devices suitable for integration with silicon integrated circuits (ICs), especially those that can be embedded in the back-end-of-line (BEOL) process. More recently, ferroelectricity has been found in wurtzite aluminum nitride-based materials, such as scandium and boron-doped aluminum nitride (Al<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>1</roman>-<i>x</i></sub>Sc<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>x</i></sub>N and Al<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>1</roman>-<i>x</i></sub>B<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>x</i></sub>N). Although these materials currently have undesirably large coercive electric fields, and small breakdown electric field-to-coercive electric field ratio, their low processing temperatures and large remanent polarization offer intriguing possibilities for device applications. Here, we report ferroelectric field-effect transistors (FeFETs) with a 15 nm thick Al<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.88</roman></sub>B<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.12</roman></sub>N layer and an 11 nm ZnO semiconductor channel, achieving a memory window >1 V and switching voltages (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>switch</roman></sub>) <±10 V.

  PublisherDOI

• Indirect Tunneling Enabled Spontaneous Time-Reversal Symmetry Breaking and Josephson Diode Effect in TiN/Al$_2$O$_3$/Hf$_{0.8}$Zr$_{0.2}$O$_2$/Nb tunnel junctions

  ArXiv.org · 2025-04-23

  preprintOpen access

  Josephson diode (JD) effect found in Josephson tunnel junctions (JTJs) has attracted a great deal of attention due to its importance for developing superconducting circuitry based quantum technologies. So far, the highly desirable electrical control of the JD effect has not been demonstrated in any JTJ prepared by techniques used in semiconductor industry. We report the fabrication of JTJs featuring a composite tunnel barrier of Al$_2$O$_3$ and Hf$_{\mathrm{0.8}}$Zr$_\mathrm{0.2}$O$_2$ prepared by complementary-metal-oxide-semiconductor (CMOS) compatible atomic layer deposition (ALD). These JTJs were found to show the JD effect in nominally zero magnetic fields with the nonreciprocity controllable using an electric training current, yielding a surprisingly large diode efficiency not achieved previously. The quasiparticle tunneling, through which the Josephson coupling in a JTJ is established, was found to show no nonreciprocity. We attribute these observations to the simultaneous presence of positive and negative Josephson couplings, with the latter originating from indirect tunneling. The resulted spontaneous time-reversal symmetry breaking and the double-minima washboard potential for the ensemble averaged phase difference in the resistively and capacitively shunted junction (RCSJ) model are shown to fully account for the experimentally observed JD effect.

  PublisherOA PDFDOI

• Memory Window Improvement by Contact Depinning in Al_1-xB_xN FeFETs with ZnO Semiconductor Channel

  2025-06-22

  articleSenior author

  Growing interest in nonvolatile memory compatible with back-end-of-line integration has driven advancements in ferroelectric field-effect transistors (FeFETs) with oxide semiconductors. Recently, we demonstrated $15 \mathrm{~nm} \mathrm{Al}_{1-\mathrm{x}} \mathrm{B}_{\mathrm{x}} \mathrm{N}$ FeFETs with ZnO semiconductor channels, but the memory window (MW) was small, $\sim 1 \mathrm{~V}$ at room temperature, due to a negative shift in the turn-on voltage ($\mathrm{V}_{\text {on }}$) with cycling, as shown in Fig. 3 [1]. We attribute this shift to the thinfilm transistor structure. For sufficiently large $+V_{G S}$, polarization in the $\mathrm{Al}_{1-x} \mathrm{~B}_{x} \mathrm{~N}$ layer from source to drain can be switched upward due to electron accumulation in the ZnO channel. However, for $-\mathrm{V}_{\mathrm{GS}}$, the $\mathrm{Al}_{1-\mathrm{x}} \mathrm{B}_{\mathrm{x}} \mathrm{N}$ polarization can only be switched downward in the FET contact regions. Because holes are not accumulated in the ZnO, the electric field in the channel region (between contacts) is not confined. In this region, once switched upward, the polarization will remain in this state. The unswitched polarization results in a negative shift in the gate voltage required for electron accumulation in the channel region (between the contacts). Combined with significant electron density at the source and drain metal contacts due to Fermi level pinning near the ZnO conduction band minimum at the $\mathrm{ZnO}-\mathrm{Ti}$ interface ($\mathrm{E}_{\mathrm{C}}-\mathrm{E}_{\mathrm{F}} \sim 0.1 \mathrm{eV}$), this results in a negative shift in the threshold and turn-on voltages for the FeFET (Fig. 5). By introducing a thin Al<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> dielectric layer between the ZnO channel and Ti source/drain contacts, we are able to unpin the Fermi level, resulting in a large increase in memory window (to $\sim 10 \mathrm{~V}$ for FeFETs with 15 nm thick $\mathrm{Al}_{1-\mathrm{x}} \mathrm{B}_{\mathrm{x}} \mathrm{N}$ and 10 nm thick ZnO channel).

  PublisherDOI

• GaN Bootstrapping Amplifier IC Operating at up to 800 °C Temperature

  IEEE Electron Device Letters · 2025-06-24 · 5 citations

  article

  A gallium nitride bootstrapping amplifier integrated circuit is demonstrated for high-temperature applications. The amplifier leverages bootstrapping gainboosting technology and incorporates five monolithically integrated depletion-mode gallium nitride high electron mobility transistors, enabling an operation temperature up to 800 °C in N2 environment. Those transistors feature a threshold voltage of approximately −2 V. Under a gate-to-source voltage of 5 V, the on-state current density decreased from 167 mA/mm at 25 °C to 45 mA/mm at 800 °C. At 25 °C, the amplifier exhibits a DC gain of 26.3 dB with a unity gain frequency of 8.9 MHz. At 800 °C, the amplifier delivers a DC gain of 31 dB and a unity gain frequency of 1.4 MHz. In addition, no significant degradation was observed after holding the transistor and amplifier unbiased for an hour at 800 °C. This amplifier integrated circuit demonstrates the competitiveness of gallium nitride high electron mobility transistors as a promising technology for high-temperature electronics, up to 800 °C.

  PublisherDOI

• Frequency dependence of wake-up and fatigue characteristics in ferroelectric Al0.93B0.07N thin films

  Acta Materialia · 2024-01-12 · 21 citations

  article
  PublisherDOI

• Adjustable X-ray optics: thin-film actuator measurement and figure correction performance

  Journal of Astronomical Telescopes Instruments and Systems · 2024-08-02

  article

  Several proposed future X-ray missions will require thin (≤0.5 mm thick) mirrors with precise surface figures to maintain high angular resolution (≤0.5 arcsec). To study methods of meeting these requirements, adjustable X-ray optics have been fabricated with thin-film piezoelectric actuators to perform figure correction. The fabrication and actuator performance for an adjustable X-ray mirror that forms a conical approximation to a Wolter-I telescope are reported. The individual responses of actuator cells were measured and shown to induce a figure change of 870 nm peak-to-valley on average. These measured responses were compared with predicted responses generated using a finite-element analysis algorithm. On average, the measured and predicted cell responses agreed to within 60 nm root mean square. A set of representative mirror distortions and the measured cell responses were used to simulate figure corrections and calculate the half-power diameter (HPD, single reflection at 1 keV) achieved. These simulations showed an improvement in 4.5 to 9 arcsec mirrors to 0.5 to 1.5 arcsec HPD. The disagreements between the predicted and measured cells’ performance in actuation and figure correction were attributed to a high spatial frequency metrology error and differences in mirror bonding considerations between the finite-element analysis model and the as-built mirror mount.

  PublisherDOI

Frequent coauthors

• David J. Gundlach

  National Institute of Standards and Technology

  81 shared

• Susan Trolier‐McKinstry

  Pennsylvania State University

  58 shared

• John E. Anthony

  University of Kentucky

  55 shared

• Oana D. Jurchescu

  Wake Forest University

  36 shared

• Sankar Subramanian

  University of Kentucky

  36 shared

• Devin A. Mourey

  Pennsylvania State University

  34 shared

• Sung Kyu Park

  Chung-Ang University

  26 shared

• Dalong Zhao

  Beihang University

  25 shared

Education

• M.D.

  Rutgers

  2020