Nikos Hardavellas

About

Nikos Hardavellas is a professor of Computer Science and Computer Engineering at Northwestern University, where he directs the Parallel Architecture Group at Northwestern (PARAG@N). His research focuses on computer architecture, specifically at the intersection of computer architecture with the computer systems stack, including programming languages, compilers, and operating systems. His work also encompasses memory systems, nanophotonics, energy-efficient computing, and quantum computing systems. Hardavellas serves on the Executive Committee of the Northwestern Institute for Quantum Information Research and Engineering (INQUIRE) and the Scientific Advisory Committee of the National Quantum Algorithms Center (NQAC). He has received numerous awards and recognitions, including an NSF CAREER award, being named a Future CRA Leader, and receiving best paper awards at various conferences. Prior to his academic career, he contributed to the design of several generations of Alpha microprocessors and high-end multiprocessor servers at Digital Equipment Corp., Compaq, and Hewlett-Packard.

Research topics

• Computer Science
• Parallel computing
• Programming language
• Artificial Intelligence
• Operating system
• Embedded system
• Database
• Distributed computing
• Algorithm
• Computer engineering

Selected publications

• AccelWattch: A Power Modeling Framework for Modern GPUs

  2021 · 108 citations

  Senior authorCorresponding

  Graphics Processing Units (GPUs) are rapidly dominating the accelerator space, as illustrated by their wide-spread adoption in the data analytics and machine learning markets. At the same time, performance per watt has emerged as a crucial evaluation metric together with peak performance. As such, GPU architects require robust tools that will enable them to model both the performance and the power consumption of modern GPUs. However, while GPU performance modeling has progressed in great strides…

  DOI

• CARAT: a case for virtual memory through compiler- and runtime-based address translation

  2020 · 14 citations

  Virtual memory is a critical abstraction in modern computer systems. Its common model, paging, is currently seeing considerable innovation, yet its implementations continue to be co-designs between power-hungry/latency-adding hardware (e.g., TLBs, pagewalk caches, pagewalkers, etc) and software (the OS kernel). We make a case for a new model for virtual memory, compiler- and runtime-based address translation (CARAT), which instead is a co-design between the compiler and the OS kernel. CARAT can…

  DOI

• SupermarQ: A Scalable Quantum Benchmark Suite

  arXiv (Cornell University) · 2022-02-22 · 10 citations

  preprintOpen access

  The emergence of quantum computers as a new computational paradigm has been accompanied by speculation concerning the scope and timeline of their anticipated revolutionary changes. While quantum computing is still in its infancy, the variety of different architectures used to implement quantum computations make it difficult to reliably measure and compare performance. This problem motivates our introduction of SupermarQ, a scalable, hardware-agnostic quantum benchmark suite which uses applicatio…

  PublisherOA PDFDOI

• ACCLAiM: Advancing the Practicality of MPI Collective Communication Autotuning Using Machine Learning

  2022-09-01 · 9 citations

  articleSenior author

  MPI collective communication is an omnipresent communication model for high-performance computing (HPC) systems. The performance of a collective operation depends strongly on the algorithm used to implement it. MPI libraries use inaccurate heuristics to select these algorithms, causing applications to suffer unnecessary slowdowns. Machine learning (ML)-based autotuners are a promising alternative. ML autotuners can intelligently select algorithms for individual jobs, resulting in near-optimal pe…

  PublisherDOI

• A FACT-based Approach: Making Machine Learning Collective Autotuning Feasible on Exascale Systems

  2021-11-01 · 9 citations

  article

  According to recent performance analyses, MPI collective operations make up a quarter of the execution time on production systems. Machine learning (ML) autotuners use supervised learning to select collective algorithms, significantly improving collective performance. However, we observe two barriers preventing their adoption over the default heuristic-based autotuners. First, a user may find it difficult to compare autotuners because we lack a methodology to quantify their performance. We call…

  PublisherDOI

Recent grants

• SHF:Small:Collaborative Research: Elastic Fidelity: Trading-off Computational Accuracy for Energy Efficiency

  NSF · $218k · 2012–2015

• CAREER: Energy-Efficient and Energy-Proportional Silicon-Photonic Manycore Architectures

  NSF · $470k · 2015–2021

Frequent coauthors

• Babak Falsafi

  28 shared

• Ippokratis Pandis

  Amazon (United States)

  22 shared

• Chris Wilkerson

  Intel (United States)

  19 shared

• Tor M. Aamodt

  University of British Columbia

  19 shared

• Anastasia Ailamaki

  17 shared

• Lieven Eeckhout

  Ghent University

  17 shared

• Jared C. Smolens

  Oracle (United States)

  17 shared

• Juanita Hoe

  University of West London

  17 shared

Labs

• Parallel Architecture Group at Northwestern (PARAG@N)PI

Education

• PhD, CS

  Carnegie Mellon University

  2009

• MSc, CS

  Carnegie Mellon University

  2006

• MSc, CS

  University of Rochester

  1997

• BSc, CS

  University of Crete

  1995

Awards & honors

• Future CRA Leader by the Computing Research Association (202…
• NSF CAREER award (2015)
• Best paper awards, nominations and test-of-time awards at HP…
• IEEE Micro Top Picks Award (2010)
• IEEE Micro Top Picks Honorable Mention (2023)

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• Joseph Hupph-171
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