About

Kamran Entesari is a Professor in the Department of Electrical & Computer Engineering at Texas A&M University. His research interests include radio frequency (RF), microwave, and millimeter-wave integrated circuits and systems, as well as RF photonics and chemical/biochemical sensing systems. He focuses on the design and development of microwave filters, antennas, and passive components, contributing to advancements in high-frequency electronic systems. He holds a Ph.D. in Electrical Engineering from the University of Michigan, Ann Arbor, obtained in 2005, along with a master's degree from Tehran Polytechnic University and a bachelor's degree from Sharif University of Technology. Throughout his career, he has received numerous awards, including the Distinguished Achievement Award from the College of Engineering at Texas A&M University in 2025, and is a Fellow of the IEEE. His notable recognitions also include the NSF CAREER Award and multiple best student paper awards at prominent conferences. Professor Entesari has made significant contributions to the field through his research on integrated RF systems, including the development of full-duplex front ends, wideband millimeter-wave CMOS receivers, and reconfigurable hybrid-integrated heterodyning software-defined radio receivers. His work advances the capabilities of high-frequency communication and sensing technologies, impacting both academic research and practical applications in wireless communication, radar, and sensing systems.

Research topics

• Electronic engineering
• Electrical engineering
• Engineering
• Materials science
• Optoelectronics
• Physics
• Telecommunications

Selected publications

• A mm-Wave Wideband Tunable Electrical Balance Duplexer with an Integrated Low-Noise Amplifier in 22-nm CMOS FDSOI

  2026-01-18

  articleSenior author

  This paper introduces an integrated electrical balance duplexer (EBD) combined with a low-noise amplifier (LNA), operating within 23–30 GHz suitable for mm-Wave full-duplex (FD) applications. The duplexer provides 40 dB TX-to-RX isolation over >300 MHz bandwidth and is equipped with a tunable balancing network to maintain the balance condition across the operating frequency range. The balancing network employs stacked switches, ensuring sufficient linearity and power handling. Additionally, the balancing network accommodates an antenna VSWR of up to 1.22:1. The LNA, integrated with the RX port of the duplexer, draws 40 mA from a 1.2 V supply and demonstrates measured performance metrics, including an IIP3 of -7 dBm, an OP<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</inf> of -5 dBm, and a voltage gain ranging from 19 to 20 dB. The RX path, encompassing the EBD's RX path loss and LNA gain, achieves a noise figure (NF) of less than 8.5 dB. The chip is fabricated by GlobalFoundries' 22-nm CMOS FDSOI and occupies an area of 1.86 mm×1.02 mm including DC and RF probing pads.

  PublisherDOI

• Integrated Phased-Array Frequency-Modulated Continuous-Wave Radar Transceivers on Silicon

  IEEE Microwave Magazine · 2025-08-06 · 1 citations

  article1st authorCorresponding

  In the rapidly evolving field of radar technology, frequency-modulated continuous-wave (FMCW) radars have emerged as a fundamental innovation, especially in their integrated form in CMOS/BiCMOS technology. These radars are known for their compactness, cost-effectiveness, and high functionality, making them ideal for many applications ranging from disaster relief, automotive safety, and autonomous driving to imaging and industrial remote sensing. However, the evolution of FMCW radars has encountered certain limitations, particularly in terms of directional capabilities and spatial resolution. This is where the integration of phased arrays plays a transformative role. This advancement allows for enhanced target detection, improved spatial resolution, and the ability to track multiple objects simultaneously. This survey aims to explore these advancements by examining innovative developments in the integration of phased arrays into FMCW radars on silicon and their applications.

  PublisherDOI

• Multi-Channel Analog Beamforming Transceiver for mmWave Communications

  IEEE Transactions on Mobile Computing · 2025-02-05 · 1 citations

  article

  This paper introduces an analog multi-channel millimeter-wave transceiver architecture that offers advantages in terms of low hardware complexity and computational efficiency compared to digital beamforming and hybrid beamforming techniques. Also, it is known that analog beamforming with a single phase-shifter network faces limitations in maintaining consistent accuracy across a wideband spectrum. To this end, the proposed architecture leverages the inherent bandwidth-splitting property of the multi-channel transceiver. Thus, each sub-band signal is processed by its corresponding channel in the transceiver with an independent analog beamformer per channel. This approach can significantly improve the beamforming accuracy in a wideband communication system such as 5G and future 6G cellular networks. The simulation results demonstrate that increasing the channels in the multi-channel transceiver enables multi-channel analog beamforming to achieve a comparable bit-error-rate (BER) performance to digital beamforming when interference is not considered. Moreover, when interference is present, the proposed multi-channel analog beamforming exhibits enhanced resilience to high power interference compared with digital beamforming with limited analog-to-digital conversion resolution.

  PublisherDOI

• A Psuedo-Differential Transimpedance Amplifier with 36 GHz Bandwidth via Inductive Peaking in 22-nm FDSOI CMOS

  2025-04-08

  articleSenior author

  This paper presents a psuedo-differential inverter based transimpedance amplifier (TIA) realized in a standard 22nm FDSOI CMOS process, utilizing an inductive peaking configuration to enhance the bandwidth. Measured results demonstrate 66dBΩ trans-impedance gain, 36GHz bandwidth with a 70fF photodiode capacitance, input referred current noise density of $18pA/\sqrt {Hz}$ at midband, and 26mW power consumption.

  PublisherDOI

• A Neural Network Approach for Calibrating Memristor Crossbars

  Proceedings of the International Symposium on Memory Systems · 2025-10-06

  articleOpen access

  Memristor technology holds significant promise for both non-volatile memory and neuromorphic computing, owing to its compact structure and ability to emulate synaptic behavior. However, the performance of memristor-based crossbar arrays is often degraded by intrinsic non-idealities, including wire resistance and parasitic inductive and capacitive effects, particularly in 1T1R (one transistor–one memristor) architectures. These distortions compromise computational accuracy and are insufficiently addressed by current design methodologies.This paper introduces a neural network-based post-calibration framework that effectively compensates for these crossbar distortions. The proposed method maps the desired conductance matrix into a latent vector space and utilizes this representation alongside the measured output currents to reconstruct the intended outputs with high fidelity. By learning and correcting the systematic errors induced by parasitic and resistive effects, the framework substantially improves the accuracy and reliability of memristor crossbars.Experimental results demonstrate that the proposed approach robustly mitigates crossbar-induced errors and restores system performance, marking a substantial advancement in the practical deployment of memristor-based neuromorphic systems. This work contributes to the broader goal of enabling high-precision analog computing in emerging memory technologies.

  PublisherDOI

• A Wideband TIA-Driver Unit in 22-nm CMOS FDSOI for Integrated Microwave Optoelectronic Oscillators

  2025-06-15 · 1 citations

  articleSenior author

  This paper presents the design and measurement results of a cascaded transimpedance amplifier (TIA)-driver unit in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$22-\text{nm}$</tex> CMOS FDSOI technology as part of a potential integrated microwave optoelectronic oscillator (OEO). The TIA utilizes three-cascaded stages of inverter-based units to increase its gain via composite transistors and reduce its power supply via current reusing while the driver is based on a 3-stacked amplifier stage with resistive feedback to increase the output swing and maintaining the amplifier stability. Measurement results show the TIA-driver unit achieves a voltage gain of 35-39 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$d B$</tex>, noise figure of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$6.5 d B$</tex> and a group delay of 50-100 ps over the 2-13 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$G H z$</tex> bandwidth. It has an output voltage swing of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\sim 1.5 V$</tex> for an input TIA current of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$300 u A$</tex>, suitable to drive a silicon photonic Mach-Zehnder modulator (MZM) as part of an integrated microwave OEO. The chip occupies an area of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.918 ~\text{mm}^{2}$</tex> and consumes 225 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$mW$</tex> using a 0.8 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V$</tex> and 2.5 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V$</tex> supply voltage for TIA and driver, respectively.

  PublisherDOI

• A 22nm CMOS 15-25GHz Dual-Differential Driver for RF Silicon Photonic Front-End

  2025-06-15 · 1 citations

  article

  An RF photonic front-end using dual-differential driving scheme is reported with a 22 nm CMOS FD-SOI driver co-integrated with a silicon traveling-wave Mach-Zehnder modulator. A compact design of power splitter and output routing network are implemented on dual-differential driver. An LC input matching network co-designed with bond wire inductance is implemented on a photonic chip to complete the output matching network. The proposed driver is verified with S-parameter and two-tone measurements, achieving <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$15-25 \text{GHz}$</tex> bandwidth with peak 3 dBm IIP3 and consumes 448 mW. The link performance is demonstrated <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{1 2. 1 \%}$</tex> EVM of 16-QAM modulation with 2Gbd at 20 GHz carrier frequency.

  PublisherDOI

• An mm-Wave Full-Duplex Front End With Integrated LNA, PA, and Electrical Balance Duplexer

  IEEE Transactions on Microwave Theory and Techniques · 2025-09-03 · 1 citations

  articleSenior author

  This article presents a 23–30-GHz front end for full-duplex (FD) communication. The front end achieves transmit–receive isolation using an electrical balance duplexer (EBD) that is integrated with a low noise amplifier (LNA) and a power amplifier (PA). The major contributions of this work include presenting a design-oriented approach to analyze EBD–PA cointegration, wherein the EBD is leveraged as part of the PA’s matching network. In addition, this work explores the challenges of achieving simultaneous EBD–PA matching, to maximize power delivery to the antenna, and EBD–antenna matching, to ensure a return loss (RL) greater than 10 dB at the antenna port. As will be demonstrated, reciprocal network constraints for PA matching network, depending on the PA’s output impedance and optimal load, may lead to a suboptimal PA operation to meet these simultaneous matching requirements. The presented EBD is tuned using a programmable balancing network that achieves over 40-dB TX–RX isolation across more than 300-MHz bandwidth, with a simulated IIP<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> of +56 dBm while accommodating antenna impedance variations within a 1.22:1 VSWR across the 23–30-GHz band. In addition, a measured isolation exceeding 30 dB over the bandwidth of operation is achieved using a real antenna with a VSWR of up to 1.5:1. The designed PA delivers a simulated output power of +16.5 dBm when loaded by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${Z}_{L\text {-Opt}}$</tex-math> </inline-formula> at 26 GHz in standalone operation. When integrated with the EBD using the proposed coil design methodology, the delivered power to the EBD’s TX port decreases by 1.3 dB to +15.2 dBm, reflecting the tradeoff associated with simultaneous EBD–PA and EBD–antenna matching. The simulated TX insertion loss (TXIL) of the EBD is 2.3–2.4 dB, and the measured power delivered to the antenna ranges from 11 to 12.9 dBm across the 23–30-GHz band. In the RX path comprising the EBD and LNA, a measured noise figure (NF) of <8.5 dB is achieved. Fabricated in GlobalFoundries 22-nm FDSOI CMOS, the chip occupies 2.36 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.98\times 1.19$</tex-math> </inline-formula>mm), inclusive of all pads.

  PublisherDOI

• A Four-Element 27/38 GHz mm-Wave Wideband Printed Slot Array Antenna for 5G Wireless Communication Applications

  2025-07-13

  articleSenior author

  This paper presents a four-element <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$27 / 38 \text{GHz}$</tex> mmWave wideband phased array antenna utilizing printed slot antenna elements for 5 G mobile and wireless communications applications. The primary substrate employed is RT/duroid 5880 laminate, chosen to enable sufficient bandwidth for two millimeter-wave (mmWave) bands while simultaneously reducing the impact of mutual coupling between adjacent elements. A secondary FR-4 layer is utilized as a stable mount mechanical support for measurement purposes. A broad matching bandwidth from 25 GHz to 47 GHz is achieved. The element spacing is set to be <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.5 \lambda_{0}$</tex> at 33 GHz that provides minimum 14.8 dB of isolation between elements. The wideband array shows pure linearly polarized radiation pattern with maximum gain of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\sim 10 ~\text{dB}$</tex> and radiation efficiency of 89 % within the band. The antenna array is utilized in a mmWave concurrent dual-band dual-beam phased array beamforming receiver front-end for over-the-air (OTA) measurement.

  PublisherDOI

• A 15–25-GHz Dual-Differential Photonic Front-End With Silicon Traveling-Wave Mach–Zehnder Modulator and 22-nm CMOS Driver

  IEEE Transactions on Microwave Theory and Techniques · 2025-12-29

  article

  An analog RF photonic front-end utilizing a dual-differential (DD) driving scheme is presented that features a 22-nm FD-SOI CMOS driver co-integrated with a silicon DD traveling-wave Mach–Zehnder modulator (DD-TW-MZM). This driving scheme offers an efficient and compact solution that enhances modulation depth by 6 dB at the cost of increased routing complexity. The driver incorporates a compact power splitter and an output routing network that enables the DD driving configuration. Slow wave (SW) electrodes and phase recovery loops are utilized in the DD-TW-MZM design to optimize electrooptic performance. Additionally, an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$LC$</tex-math> </inline-formula> input matching network (IMN) co-designed with bond wire inductances is implemented on the silicon photonic integrated circuit (Si-PIC) to optimize matching with the CMOS driver. Implemented with both 1- and 2-mm long DD-TW-MZM variations, the proposed integrated front-end achieves a wide 15–25-GHz bandwidth and 11.3% EVM at 3 Gb/s 16-QAM operation with the 1-mm MZM.

  PublisherDOI

Recent grants

• SpecEES: Spectrum and Energy Efficient Silicon Photonic Millimeter-wave Remote Antenna Units for Radio over Fiber Application

  NSF · $675k · 2018–2023

• Wideband Silicon-Based Receivers for RF/Microwave Spectrum Sensing

  NSF · $287k · 2012–2016

• A Wideband Silicon Photonic Millimeter-wave Beam-forming Transmitter with Automatic Beam Calibration

  NSF · $360k · 2018–2022

• CAREER: Versatile Integrated Platforms for Broadband Microwave Dielectric Spectroscopy

  NSF · $400k · 2011–2016

• SWIFT: Reconfigurable Microwave Silicon Photonics Filters and Passive-User-Friendly Protocols for Spectrum Coexistence

  NSF · $750k · 2021–2025

Frequent coauthors

• Samuel Palermo

  Analog Devices (United States)

  36 shared

• Sherif Shakib

  Market Matters

  30 shared

• V. Aparin

  Market Matters

  30 shared

• Jeremy Dunworth

  Qualcomm (United States)

  25 shared

• Masoud Moslehi Bajestan

  Qualcomm (United States)

  24 shared

• Elif Kaya

  Texas A&M University

  24 shared

• H. Hedayati

  Semnan University

  23 shared

• Ali Pourghorban Saghati

  Analog Devices (United States)

  22 shared

Awards & honors

• Distinguished Achievement Award, College of Engineering, 202…
• Fellow, Institute of Electrical and Electronics Engineers (I…
• Qualcomm Faculty Award – 2017, 2018
• Best Student Paper Award, IEEE Symposium on Radio Frequency…
• Best Student Paper Award, IEEE International Microwave Sympo…