About

Elad Alon is a Professor of Electrical Engineering and Computer Sciences at the University of California, Berkeley, who joined the university in January 2007. He is also a co-director of the Berkeley Wireless Research Center (BWRC). His research focuses on energy-efficient integrated systems, including the circuit, device, communications, and optimization techniques used to design them. Dr. Alon has held founding, consulting, or visiting positions at various industry and research institutions such as Locix, Lion Semiconductor, Cadence, Xilinx, Sun Labs, Intel, AMD, Rambus, Hewlett Packard, and IBM Research, where he worked on digital, analog, and mixed-signal integrated circuits for computing, high-speed communications, and test and measurement. His work has earned him numerous awards, including the IEEE Fellow in 2019, the IEEE Electrical Engineering Award for Outstanding Teaching in 2017, and the IBM Faculty Award in 2008. He holds a Ph.D. in Electrical Engineering from Stanford University, obtained in 2006, along with a Master's and Bachelor's degree from Stanford in 2002 and 2001, respectively.

Research topics

• Computer Science
• Electrical engineering
• Electronic engineering
• Engineering
• Telecommunications
• Optoelectronics
• Physics
• Computer hardware
• Materials science

Selected publications

• MRDust: Wireless Implant Data Uplink & Localization via Magnetic Resonance Image Modulation

  ArXiv.org · 2025-05-30

  preprintOpen access

  Magnetic resonance imaging (MRI) exhibits rich and clinically useful endogenous contrast mechanisms, which can differentiate soft tissues and are sensitive to flow, diffusion, magnetic susceptibility, blood oxygenation level, and more. However, MRI sensitivity is ultimately constrained by Nuclear Magnetic Resonance (NMR) physics, and its spatiotemporal resolution is limited by SNR and spatial encoding. On the other hand, miniaturized implantable sensors offer highly localized physiological information, yet communication and localization can be challenging when multiple implants are present. This paper introduces the MRDust, an active ``contrast agent" that integrates active sensor implants with MRI, enabling the direct encoding of highly localized physiological data into MR images to augment the anatomical images. MRDust employs a micrometer-scale on-chip coil to actively modulate the local magnetic field, enabling MR signal amplitude and phase modulation for digital data transmission. Since MRI inherently captures the anatomical tissue structure, this method has the potential to enable simultaneous data communication, localization, and image registration with multiple implants. This paper presents the underlying physical principles, design tradeoffs, and design methodology for this approach. To validate the concept, a 900 $\times$ 990 $μ$m$^2$ chip was designed using TSMC 28 nm technology, with an on-chip coil measuring 630 $μ$m in diameter. The chip was tested with custom hardware in an MR750W GE3T MRI scanner. Successful voxel amplitude modulation is demonstrated with Spin-Echo Echo-Planar-Imaging (SE-EPI) sequence, achieving a contrast-to-noise ratio (CNR) of 25.58 with a power consumption of 130 $μ$W.

  PublisherOA PDFDOI

• MRDust: Wireless Implant Data Uplink & Localization via Magnetic Resonance Image Modulation

  IEEE Transactions on Biomedical Circuits and Systems · 2025-08-13

  article

  Magnetic resonance imaging (MRI) exhibits rich and clinically useful endogenous contrast mechanisms, which can differentiate soft tissues and are sensitive to flow, diffusion, magnetic susceptibility, blood oxygenation level, and more. However, MRI sensitivity is ultimately constrained by Nuclear Magnetic Resonance (NMR) physics, and its spatiotemporal resolution is limited by SNR and spatial encoding. On the other hand, miniaturized implantable sensors offer highly localized physiological information, yet communication and localization can be challenging when multiple implants are present. This paper introduces the MRDust, an active "contrast agent" that integrates active sensor implants with MRI, enabling the direct encoding of highly localized physiological data into MR images to augment the anatomical images. MRDust employs a micrometer-scale on-chip coil to actively modulate the local magnetic field, enabling MR signal amplitude and phase modulation for digital data transmission. Since MRI inherently captures the anatomical tissue structure, this method has the potential to enable simultaneous data communication, localization, and image registration with multiple implants. This paper presents the underlying physical principles, design tradeoffs, and design methodology for this approach. To validate the concept, a 900 $\times$ 990 $\mu$m${}^{2}$ chip was designed using TSMC 28 nm technology, with an on-chip coil measuring 630 $\mu$m in diameter. The chip was tested with custom hardware in an MR750W GE3T MRI scanner. Successful voxel amplitude modulation is demonstrated with Spin-Echo Echo-Planar-Imaging (SE-EPI) sequence, achieving a contrast-to-noise ratio (CNR) of 25.58 with a power consumption of 130 $\mu$W.

  PublisherDOI

• NEURAL DUST:

  Princeton University Press eBooks · 2024-04-30 · 1 citations

  book-chapterSenior author
  PublisherDOI

• The MRDust: An Implantable Neural Interface Powered via Focused Ultrasound with Data Communication via MR Image Modulation

  Proceedings on CD-ROM - International Society for Magnetic Resonance in Medicine. Scientific Meeting and Exhibition/Proceedings of the International Society for Magnetic Resonance in Medicine, Scientific Meeting and Exhibition · 2024-08-14 · 1 citations

  article

  We propose a new device for neuroscience studies: the MRDust, a sub-mm wireless programmable neural recording mote with on-device memory and compute. It receives power via focused ultrasound, records neural signals in burst mode, and uses a micro-coil to perturb local magnetic fields to achieve data uplink via dynamic MRI signal modulation. We demonstrate proof-of-concept experiments in which digital information is encoded in images of an SE-EPI dynamic sequence, and in which a piezoelectric harvester can harvest enough ultrasonic power to sustain device operation, and receive control signals through amplitude modulation.

  PublisherDOI

• Power Integrity Analysis for Interoperability of BoW Chiplet Interfaces

  2024-01-06 · 1 citations

  article

  With data rates rising and the supply voltages reducing in applications involving high-speed IOs, the necessity for good power integrity at the die, package and board has become more important and challenging as the noise specifications have become even more stringent. The work shown in this paper demonstrates a framework for analysing and improving the power integrity for high speed and high density die-to-die (chiplet) interconnects. It also illustrates the interoperability of BoW PHY chiplets from two independent implementations. Different modelling techniques of the PCB, package and die have been discussed along with the the methodology for suppressing the switching noise caused by the loop inductances formed due to the parasitics present in the interconnects. The power integrity analysis of five different test structures designed and laid out in a single package by the OCP ODSA community following the BoW 1.0 standard is shown.

  PublisherDOI

• The MRDust: Wireless Data Uplink & Localization via Magnetic Resonance Image Modulation

  2024-07-15

  article

  We propose a wireless data uplink and localization method for miniaturized sensor implants through magnetic resonance imaging (MRI). Local MRI signals are dynamically modulated by a micro-coil on an integrated circuit (IC). A proof-of-concept chip was designed and tested in a 3T scanner to demonstrate MR image modulation. The proposed uplink approach could enable simultaneous data readout from multiple implants with easy device localization and built-in image registration.

  PublisherDOI

• Precursor ISI Cancellation Sliding-Block DFE for High-Speed Wireline Receivers

  IEEE Transactions on Circuits and Systems I Regular Papers · 2023-08-07 · 8 citations

  article

  This article introduces a cascaded sliding-block decision feedback equalizer (SB-DFE) that equalizes multiple precursor and postcursor intersymbol interference (ISI). The paper also presents an enhanced statistical analysis for the DFE in the presence of residual ISI and additive white Gaussian noise (AWGN), along with generalized expressions for the probability and expected length of DFE burst errors. In addition, the statistical analysis is extended to the conventional SB-DFE and our proposed cascaded SB-DFE to accurately estimate their equalization capability, latency, and steady-state bit error rate (BER). The simulation results reveal that the cascaded SB-DFE provides as low BER as the mininum mean-squared error - DFE (MMSE-DFE) with substantially lower latency and hardware overhead.

  PublisherDOI

• A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow

  2022 IEEE International Symposium on Circuits and Systems (ISCAS) · 2022-05-28 · 5 citations

  articleSenior author

  We present a ring-oscillator-based sub-sampling phase-locked loop (PLL) using a generator-based design flow. A hybrid loop with a delta-sigma ($\Delta \Sigma$) modulator is applied to reduce the loop filter (LF) area and the control ripple. The generator automatically produces the ring oscillator and PLL to meet the provided specifications. The 10-GHz PLL instance implemented in 28-nm planar process achieves RMS jitter of}299.5 fs and power of 9.9 mW from a 1-V supply.

  PublisherDOI

• A D-Band Packaged CMOS Integrated Transmitter for MU-MIMO Applications

  2022 IEEE Asian Solid-State Circuits Conference (A-SSCC) · 2022-11-06 · 4 citations

  article

  Growing demand for data across all communication requires an increase in both of capacity and density of back-haul point-to-point (PTP) and point-to-multipoint (PTMP) data links [1]. A D-band (110-170GHz) phased-array transceiver offers an attractive means to increase the capacity by leveraging the large available bandwidth and overcomes the high free-space path loss by adopting large array gain. Recent advances in process scaling are enabling > 100GHz transceiver implementations in low-cost CMOS technologies for commercial applications. In addition, to meet the requirements of future commercial systems above 100GHz, a low-cost and high-performance packaging platform is required. Recent publications have demonstrated high performance D-band transceivers capable of high-order and wide-bandwidth modulation [1, 2, 3, 4, 5]. However, very few are packaged or are tested with an on-chip PLL.

  PublisherDOI

• An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS

  IEEE Journal of Solid-State Circuits · 2021-09-15 · 42 citations

  articleOpen accessSenior author

  This article presents a 200-Gb/s pulse amplitude-modulation four-level (PAM-4) and 100-Gb/s non-return-to-zero (NRZ) transmitter (TX) in 28-nm CMOS technology. To achieve the target data rate, the output bandwidth and swing of the proposed TX are optimized by minimizing the output capacitance of the 4:1 multiplexer (MUX) and driver stage with pull-up current sources and adopting a fully reconfigurable 5-tap feed-forward equalizer (FFE). The key circuit includes a segmented 8:4 MUX and 4:1 MUX/driver, a thermal encoder and retimer, and a flexible clock distribution network. Using the layout generated with Berkeley Analog Generator (BAG), the proposed TX achieves an eye opening with >52.9-mV eye height, 0.36 UI eye width, >98% RLM, and 4.63 pJ/b at 200-Gb/s PAM-4 signaling under >6-dB channel loss at 50 GHz, demonstrating the highest data rate achieved using a planar process.

  PublisherOA PDFDOI

Frequent coauthors

• Borivoje Nikolić

  University of California, Berkeley

  47 shared

• Ali M. Niknejad

  30 shared

• Tsu‐Jae King Liu

  University of California, Berkeley

  22 shared

• Jan M. Rabaey

  21 shared

• Jaeduk Han

  Hanyang University

  21 shared

• Hei Kam

  University of California, Berkeley

  20 shared

• Michel M. Maharbiz

  Spectrum Research (United States)

  17 shared

• Krste Asanović

  University of California, Berkeley

  17 shared

Labs

• Integrated Circuits (INC)PI

Education

• Ph.D., Electrical Engineering and Computer Sciences

  University of California, Berkeley

  1994

• M.S., Electrical Engineering and Computer Sciences

  University of California, Berkeley

  1990

• B.S., Electrical Engineering

  Technion - Israel Institute of Technology

  1988

Awards & honors

• IBM Faculty Award (2008)
• Hellman Family Faculty Fund Award (2009)
• UC Berkeley Electrical Engineering Outstanding Teaching Awar…
• ISSCC Jack Raper Award for Outstanding Technology Directions…
• Symposium on VLSI Circuits Best Student Paper Award (2011)