
James Buckwalter
· ProfessorVerifiedUniversity of California, Santa Barbara · Electrical and Computer Engineering
Active 2003–2026
About
James Buckwalter is a Professor in the Department of Electrical and Computer Engineering at UC Santa Barbara. His research interests include high-speed mixed-signal circuits, RF and millimeter-wave integrated circuits and systems, photonics, optoelectronic interfaces, and CMOS and III-V integrated circuits. He is associated with the Wireless and Optoelectronic Integrated Circuits Lab and is based in the Harold Frank Hall, Room 4155. His contact information includes a phone number (+1 805-893-5639), email (buckwalter@ece.ucsb.edu), and office location at 2205C Engineering Science Building. Professor Buckwalter's work focuses on advancing integrated circuit technologies and systems in the fields of high-frequency electronics and photonics, contributing to the development of innovative solutions in these areas.
Research topics
- Electrical engineering
- Computer Science
- Electronic engineering
- Engineering
- Physics
- Optics
- Telecommunications
- Optoelectronics
- Materials science
- Computer hardware
Selected publications
A Preview of Upcoming IMS2026 Panels
IEEE Microwave Magazine · 2026-04-10
article1st authorCorresponding2025-01-01
articleWe report a 0.91 pJ/bit, differential dual-channel TIA with variable gain reaching 64 dBΩ in 90-nm SiGe measured in a reconfigurable PAM4/QPSK O-band receiver at 53.125 Gbaud with BERs below the KP4-FEC threshold of 2.2e-4.
An Antipodal SIW-Fed Vivaldi Antenna at D-Band in LTCC for Flip-Chip RFIC Integration
2025-06-15
articleSenior authorThis paper introduces a single-element antipodal Substrate Integrated Waveguide (SIW) feed for a Vivaldi antenna at D-band, integrated in a Low Temperature Co-fired Ceramics (LTCC) interposer. Analysis and measurement of the SIW loss in the LTCC substrate is provided over D-band (110-170 GHz). Achieving measured peak gain of 6.4 dBi and covering most of D-band, the antipodal Vivaldi can be arranged into linear arrays with flip-chipped radio-frequency integrated circuits (RFICs). This work demonstrates the feasibility of integrating antipodal SIW Vivaldi antennas in LTCC for D-band applications, paving the way for scalable RFIC packaging solutions in next-generation communication and radar systems.
2025-06-15 · 1 citations
articleSenior authorAn oversampling digital-to-phase (ODP) transmitter (TX) is proposed based on scaling independent channels consisting of a multiplier chain ($\mathbf{X} N$), two-bit quadrature phase shifter (PS), and a power amplifier (PA). Each channel operates under constant envelope conditions for maximum power efficiency. Direct digital modulation is applied to the RF carrier of each channel. The prototype array, fabricated in a 22-nm FD-SOI CMOS technology, consists of four channels operating over a 3-dB bandwidth from 110 to 122 GHz. The CMOS chip is flip-chip mounted onto a Low-Temperature Co-fired Ceramic (LTCC) interposer with integrated Vivaldi antennas and wire-bonded to a PCB. The 4-element array exhibits a measured peak effective isotropic radiated power (EIRP) of 26.6 dBm with ± 25° scanning range. With just two bits of phase control per channel, the proposed array is able to achieve 8-PSK modulation at 1.5 Gbps, 1 dB power back off, and 12.3% EVM. Despite no explicit amplitude modulation, 8-APSK modulation is achieved at 150 Mbps, 3-dB power back off, and 12.8% EVM. The proposed direct modulation scheme is a scalable millimeter-wave (mm-wave) TX architecture for digital modulation and beamsteering.
IEEE Journal of Microwaves · 2025-12-17
articleOpen accessSenior authorA Doherty power amplifier is introduced that uses a hybrid combination of common-emitter (CE) and common-base (CB) devices for operation above 100 GHz. The use of CE and CB devices demonstrates dynamic input power splitting between a main and auxiliary amplifier with phase matching and gain equalization to achieve high average efficiency in a compact area. The analysis and implementation of 2 and 3-stage power amplifiers is presented. The 2-stage Doherty PA achieves a peak efficiency of 14.2% at 13.74 dBm and a 6-dB backoff efficiency of 9.9% at 135 GHz. The 3-stage Doherty PA achieves a peak efficiency of 12.4% at 12.2 dBm and a 6-dB backoff efficiency of 10.6% at 129 GHz. Modulation measurements of the 3-stage Doherty PA at 129 GHz for 16, 64 and 256-QAM are also presented achieving 14.5, 8.6 and 4.8% EVM respectively without digital predistortion (DPD) and 8.9, 4.8 and 2% respectively with DPD.
A 110-130-GHz, Frequency Quadrupler with 12.5% Drain Efficiency in 22-nm FD-SOI CMOS
2025-06-15
articleSenior authorA high-efficiency frequency quadrupler (X4) operates between 110 and 130 GHz. The design consists of two push-pull doublers and three differential amplifiers that improve output power and conversion gain. An extended-drain field-effect transistor (ED-FET), available in a 22-nm FD-SOI CMOS technology, is used to increase the supply voltage to 1.4 V, achieving a peak measured output power of 11.3 dBm with 12.5% drain efficiency and 6.1 dB peak conversion gain. To our knowledge, this is the highest output power and drain efficiency for silicon-based D-Band frequency multipliers.
A 100 Gbps Fully Packaged O-band Micro-ring Modulator Based Coherent Transmitter
2025-01-01
articleA fully packaged O-band coherent transmitter, comprising a fiber-attached MRM-based silicon photonic transmitter and a co-designed electronic integrated circuit on a custom PCB, achieved 100 Gbps QPSK modulation below the HD-FEC bit error rate threshold.
An Ultra-Compact D-Band SiGe Low Noise Amplifier for Array Integration
2025-10-12
articleSenior authorWe present a compact four-stage, 123 to 164 GHz low-noise amplifier (LNA) fabricated in a 90-nm SiGe BiCMOS technology. The LNA uses common-emitter and common-base stages with staggered tuning to achieve high gain and wide bandwidth across D-band while minimizing area consumption. The LNA demonstrates a maximum gain of 19.7 dB with a minimum noise figure of 7.0 dB while consuming 37.6 mW and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.015 \text{mm}^{2}$</tex> of area. To our knowledge, this work has the lowest active area consumption for reported LNAs in D-band while demonstrating comparable performance and power consumption to earlier literature, making it suitable for highly scaled receiver arrays.
2025-10-12
articleSenior authorThis paper presents a D-band double-balanced passive mixer operating in the 110-170 GHz range. The mixer is implemented in a 22-nm fully-depleted (FD) silicon-on-insulator (SOI) process with backgate biasing, achieving the best conversion loss (CL) of 13.3 dB, an IP1dB of 4.1 dBm, and double-sideband (DSB) noise figure (NF) of 11.6 dB. The mixer offers a local oscillator (LO) bandwidth of 60 GHz, covering the entire D-band (110-170 GHz) while the radio frequency (RF) and the intermediate frequency (IF) cover 27.8 GHz (110-137.8 GHz), and 10.8 GHz(5.5-16.3 GHz), respectively. The design is based on a passive field-effect transistor (FET) ring mixer and transformer-based matching networks are used for impedance matching, differential to single-ended conversion, and bias feeding, simultaneously. To the best of our knowledge, this paper reports the highest measured IP1dB for passive mixers operating at D-band.
Optics Express · 2025-11-05
articleOpen accessWe report what is believed to be the first unamplified analog coherent link using heterogeneously integrated lasers in both the TX and RX. The link achieves a 10 dB fiber-to-fiber link budget while operating with BER below the KP-4 FEC threshold, and a 7 dB fiber-to-fiber link budget with BER below the KR-4 FEC threshold, both while transporting 100 Gbps QPSK over a single polarization. The facet-to-facet link budgets are 23 dB and 20 dB respectively. QPSK transmission is measured through an O-band silicon photonics integrated wavelength-selective switch with a BER below the Staircase FEC threshold.
Recent grants
CAREER: Reconfigurable Traveling Wave Silicon Integrated Circuits for Millimeter-Wave Testing
NSF · $400k · 2011–2015
Enabling Algorithms, Signal Processing, and Circuits for Agile Cognitive Radio in CMOS Technology
NSF · $1.1M · 2015–2019
CAREER: Reconfigurable Traveling Wave Silicon Integrated Circuits for Millimeter-Wave Testing
NSF · $288k · 2015–2017
SpecEES: Collaborative Research: Energy Efficient Millimeter Wave Cellular Networks
NSF · $225k · 2018–2022
Plesiochronous Communication for Silicon-Constrained High-Speed Serial Links
NSF · $324k · 2009–2013
Frequent coauthors
- 41 shared
Clint L. Schow
University of California, Santa Barbara
- 37 shared
P.M. Asbeck
University of California, San Diego
- 34 shared
Aaron Maharry
University of California, Santa Barbara
- 29 shared
Hector Andrade
- 22 shared
L.E. Larson
Providence College
- 20 shared
Luis A. Valenzuela
Intel (United States)
- 20 shared
Cameron Hill
University of California, Santa Barbara
- 20 shared
Jeff Shih-Chieh Chien
University of California, Santa Barbara
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